MediaTek is getting ready to introduce its Dimensity 9300 chipset, which is creating quite a buzz due to its unique design featuring all-big-core architecture. According to information from Digital Chat Station, the launch of this chipset is anticipated in October. This source also discloses that the chipset will showcase an 8-core CPU setup, consisting of 4 Cortex-X4 and 4 Cortex-A720 cores, along with the Immortalis G720 GPU. This change from smaller cores is expected to enhance performance and lower power consumption.
The Cortex-X4 cores within the Dimensity 9300 are projected to provide a 15% performance improvement and a 40% reduction in power usage. Additionally, the Cortex-A720 cores are likely to achieve a notable 20% increase in energy efficiency.
Crafted using TSMC’s N4P process, the Dimensity 9300 aims to surpass Apple’s A17 chip by considerably reducing power consumption linked to paper-based usage, by over 50%. This transition to complete 64-bit processing is anticipated to contribute to smoother smartphone functioning and reduced power drain.
The Dimensity 9300 has displayed its capabilities when paired with SK Hynix’s LPDDR5T mobile DRAM, achieving remarkable speeds of 9.6Gbps – which is a remarkable 13% improvement compared to the previous generation. This progress might make its debut in the Vivo X100 series, potentially enhancing performance for Android devices.
The launch of the Dimensity 9300 is planned before Qualcomm’s 2023 Snapdragon Summit, which is expected to feature the Snapdragon 8 Gen 3 chipset. There are whispers that the global introduction of the Dimensity 9300 might occur with the vivo X100 series. As the launch date approaches, it appears the chipset holds great promise for significantly advancing smartphone performance and efficiency.
According to DCS, it’s also suggested that the Snapdragon 8 Gen 3 might come with a higher cost, prompting some manufacturers to consider using older Snapdragon 8 Gen 2 or Dimensity platforms in their new devices. This strategy could save them money while maintaining efficiency and functionality.
